It is an inaccurate and highly simplified tool for the design of silicon chip layouts. Unlike common educational tools for logic circuits designs, in Pharo Chip Designer, you need to face the real-life problems like propagation delays or limited amount of layers and available substrate area.
The Pharo Chip Designer runs withing Pharo 8.0 environment. Currently, it is not provided as a standalone application because the main purpose of it is not to imitate the original game but to provide a base for own experiments where you want to have full control over the input and output signals. Pharo provides an interactive environment for it. Read more here
Another quick work in progress video for my next ESUG demo (Ronie Salgado)
Pharo and Smalltalk Events
ESUG 2019 Cologne, Germany 26-30 August 2019: Link
Camp Smalltalk as Part of ESUG: 24/25 August 2019 Link
Smalltalks 2019, Neuquén, Argentina, November 13-15 2019 Link